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Peter Lee of Micron Tapped for Si2 Pinnacle Award

·3-min read

Peter Lee, director of a global team responsible for the DRAM design environment at Micron Technology, will receive the quarterly Silicon Integration Initiative Pinnacle Award. This award recognizes volunteers for their exceptional contributions to Si2’s success as a leading semiconductor R&D joint venture.

This press release features multimedia. View the full release here: https://www.businesswire.com/news/home/20210511005032/en/

Peter Lee, director of a global team responsible for the DRAM design environment at Micron Technology, will receive the quarterly Silicon Integration Initiative Pinnacle Award. This award recognizes volunteers for their exceptional contributions to Si2’s success as a leading semiconductor R&D joint venture. (Photo: Business Wire)

Lee serves as chair of the Si2 Compact Model Coalition, an international group that supports the development of standard compact SPICE models and standard interfaces to promote simulation tool interoperability. He has led the CMC since 2016, during which time the group has partnered with leading universities and research labs to fund four new device models and 11 existing standard models adopted by semiconductor manufacturers, designers and simulation tool providers. The CMC has consistently increased overall funding to model developers under Lee’s chairmanship.

Lee has more than 30 years of device modeling and circuit-level reliability simulation experience at Micron, Elpida Memory, Renesas Technology, and Hitachi. He earned his Ph.D. in Electrical Engineering from the University of California at Berkeley and is a senior member of the IEEE.

John Ellis, Si2 president and CEO, stated, "Peter has been a leader within the CMC since they first joined forces with Si2 in 2013, first as co-chair and then as chair. It’s a pleasure to work with Peter and recognize him publicly for his diligent effort in guiding this prestigious group. Si2 is grateful to Micron for enabling Peter to continue his efforts within the CMC."

About the Compact Model Coalition
Now in its 25th year, the Si2 Compact Model Coalition provides semiconductor manufacturers, designers, and simulation tool providers an avenue to pool resources to fund standardization and optimization of standard compact SPICE models and standard interfaces to promote simulation tool interoperability. CMC funds and supports select university and national laboratory compact model developers. The CMC quality assurance program ensures that simulations are accurate and uniform across different vendors. The world’s most advanced semiconductor designs are designed and simulated using the standards funded by the CMC.

About the Silicon Integration Initiative
Si2 is a leading research and development joint venture that provides standard interoperability solutions for IC design tools. Its primary products include OpenAccess, the world’s most widely used, open reference database for IC design, with a supporting standard APA. All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

View source version on businesswire.com: https://www.businesswire.com/news/home/20210511005032/en/

Contacts

Terry Berke, tberke@si2.org, 512-917-1358

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